RELOCATION ASSISTANCE: Relocation assistance may be available clearance:TYPE: Secret

TYPE: SecretTYPE: SecretTYPE: SecretTYPE: Secret>Secret TRAVEL:Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. We are looking for you to join our team as an Principal Digital Engineer or Sr. Principal Digital Engineer based out of Buffalo, NY . As a Principal Digital Engineer or Sr. Principal Digital Engineer at Northrop Grumman, you will have a challenging and rewarding opportunity to be a part of our Enterprise wide digital transformation. Through the use of Model based Engineering, DevSecOps and Agile practices we continue to evolve how we deliver critical national defense products and capabilities for the warfighter. Our success is grounded in our ability to embrace change, move quickly and continuously drive innovation. The successful candidate will be collaborative, open, transparent, and team oriented with a focus on team empowerment & shared responsibility, flexibility, continuous learning, and a culture of automation. What You’ll get to do Be part of Northrop Grumman's dynamic Digital Engineering team in Buffalo, NY. This team is responsible for the design of digital hardware sub systems used in the testing of military radars, radar warning receivers, and jamming systems to protect the war fighter. These digital sub systems consist of state of the art custom designed and COTS circuit boards. This engineering group is also responsible for the development of high speed FPGA’s residing on custom or COTS circuit cards. Roles & Responsibilities include but are not limited to: Lead the design and development digital circuits, including circuits that may contain FPGAs. Generate and update digital system

ital system requirements:and select components and equipment based on analysis of specifications and reliability. Use modeling and simulation tools to expedite development and testing of firmware before hardware is available. Develop test plans and implement rigorous testing and validation processes for digital designs to ensure functionality, performance and security requirements are met. Adhere to coding standards, revision control practices, and peer review procedures. Conduct tests using high speed oscilloscopes, signal generators, signal analyzers, and FPGA debugging tools, and analyze test data. Lead on site testing of digital designs. Create engineering change orders and perform fundamental types of analysis (i.e. power utilization, signal integrity, etc.). Manufacturing engineering liaison support for production hardware testing, Providing support for Systems Integration and Test operations. Use strong interpersonal skills to work effectively within a development team to understand system level interdependencies that impact circuit requirements and design constraints. " This position may be filled as a Principal Digital Engineer or a Sr. Principal Digital Engineer based on the

based on thebased on the Qualifications:listed below ." Basic

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Qualifications for a Principal Digital Engineer: Bachelor’s degree in a STEM (Science, Technology, Engineering, Math) field and 5 years of related technical

experience:Demonstrated ability to translate system performance and operational specifications into hardware requirements, design, and test specifications. Advanced knowledge of digital circuitry and design from schematic creation through fabrication, assembly, and troubleshooting. Hands on hardware/software integration experience of complex digital subsystems, such as circuit card development involving FPGAs, and/or embedded processors, and/or high speed interfaces. Must have 3 years experience in FPGA design and development using VHDL or Verilog. Must have 3 years experience with FPGA design verification using simulation, hardware verification, and debugging tools. Must have 3 years experience in the use of lab equipment such as oscilloscopes and logic analyzers. U.S.

lyzers. U.S.lyzers. U.S.lyzers. U.S.lyzers. U.S.lyzers. U.S.lyzers. U.S.lyzers. U.S. Citizenship:with the ability to obtain Department of Defense (DoD) secret clearance. Must be able to maintain this level of

his level of

clearance for continued employment.

Basic

Qualifications for a Sr. Principal Digital Engineer: Bachelor’s degree in a STEM (Science, Technology, Engineering, Math) field and 8 years of related technical

experience Demonstrated ability to translate system performance and operational specifications into hardware

requirements, design, and test specifications. Advanced knowledge of digital circuitry and design from schematic creation through fabrication, assembly, and troubleshooting. Hands on hardware/software integration

experience of complex digital subsystems, such as circuit card development involving FPGAs, and/or embedded processors, and/or high speed interfaces. Must have 7 years

experience in FPGA design and development using VHDL or Verilog. Must have 7 years

experience with FPGA design verification using simulation, hardware verification, and debugging tools. Must have 7 years

experience in the use of lab equipment such as oscilloscopes and logic analyzers. U.S. citizenship with the ability to obtain Department of Defense (DoD) secret

clearance. Must be able to maintain this level of

clearance for continued employment.

Preferred

Qualifications: Active Secret

Clearance Proficiency with schematic and programmable logic tools such as Altera/Intel Quartus, Vivado, etc. Proficiency integrating 3rd party vendor IP cores with internal designs. Proficiency in a Department of Defense (DoD) environment. Ability to collaborate in a team environment. Primary Level

salary:Range: $110,300.00 $165,500.00 Secondary Level

ondary Levelondary Levelondary LevelSalary Range: $137,400.00 $206,000.00 The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and

responsibilities of the position and the candidate's

experience,

education,

skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of

benefits:including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates. Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit http://www.northropgrumman.com/EEO. U.S.

Citizenship is required for all positions with a government

clearance and certain other restricted positions.

SECRET